1. Field of the Invention
The present invention relates to an image interpolating apparatus adapted for use in a digital camera or the like.
2. Related Background Art
Recent progress in the digital signal processing technology has greatly contributed to the expansion of the imaging. The emergence of digital recording media such as digital video camera and digital still camera has realized an environment where the recording, editing and working of image data can be easily achieved with high image quality by the personal computer or the like.
In such environment, the technology of image reduction and enlargement on real time basis within the image pickup apparatus itself is anticipated to become more and more important in the future.
The conventional digital video cameras are usually provided with a function of so-called electronic zooming, for enlarging the picked-up image by interpolation, in order to obtain an image enlarged beyond the optical zooming. There can also be achieved other processes such as electronic zoom-out for obtaining a reduced image.
In case of linearly interpolating continuous image data, obtained by sampling with a certain sampling frequency, with a sampling pitch of another sampling frequency, there is required a relative positional data k indicating the relative relationship in time between the original pixel data adjacent to an interpolated pixel and such interpolated pixel.
For obtaining such data in continuous manner, there is known a method of employing memory readout means utilizing an accumulator as disclosed in the U.S. Pat. No. 4,774,581.
FIG. 1 is a schematic view showing a part of the image of a field, stored in a field memory, wherein Sn and Snxe2x88x921 indicate stored pixel data and Sxe2x80x2 indicates data of the interpolated pixel.
In the illustrated situation, the relationship of Sn, Snxe2x88x921 and Sxe2x80x2 is represented by:
Sxe2x80x2=Snxc2x7k+Snxe2x88x921xc2x7(1xe2x88x92k). 
In order to achieve this calculation with a digital circuit, with a reduced number of multipliers, this equation is modified as:
Sxe2x80x2=(Snxe2x88x92Snxe2x88x921)xc2x7k+Snxe2x88x921. 
FIG. 2 shows an example of the electronic zoom in the horizontal direction in the conventional linear interpolation as disclosed in the Japanese Patent Application Laid-Open No. 5-83612, wherein a field memory 1 receives, through an input terminal, the image signal outputted with a sampling frequency determined by the image pickup element and stores the image data of a field.
Memory readout means 2 receives a zoom ratio set value xe2x80x9czoomxe2x80x9d from a microcomputer 3, correspondingly determines the position of the interpolated pixel in continuous manner and sends a readout control signal Cr to the field memory 1 in such a manner that, the pixel data Sn immediately after the position of the interpolated pixel, among the original image data stored in the field memory, is output at the determined position of the interpolated pixel.
Based on the readout control signal Cr from the memory readout means 2 and the zoom ratio setting value xe2x80x9czoomxe2x80x9d from the microcomputer 3, a coefficient generation circuit 4 supplies a linear interpolation circuit 6 with a relative positional data k indicating the relationship in time between the interpolated pixel Sxe2x80x2 and the original sampling pixel data Sn positioned immediately behind the interpolated pixel Sxe2x80x2.
The field memory 1 outputs the pixel data Sn instructed by the signal Cr while delay means 5 outputs a pixel data Snxe2x88x921 delayed by a clock of the original sampling frequency, and both data are simultaneously entered at a time to the linear interpolation circuit 6.
The linear interpolation circuit 6 executes the calculation:
Sxe2x80x2=(Snxe2x88x92Snxe2x88x921)xc2x7k+Snxe2x88x921 
according to the foregoing linearly interpolating equation, utilizing a subtractor 61, a multiplier 62 and an adder 63, to output an interpolated pixel data Sxe2x80x2.
The conventional linear interpolation utilizing the two adjacent pixels as explained in the foregoing simplifies the circuit configuration but the image is reduced or enlarged without improvement in definition, since the frequency characteristics are monotonously sloped as shown in FIG. 6.
The object of the present invention is to provide an image enlargement/reduction circuit capable of attaining high image quality with improvement in image definition, with a simple circuit configuration, and an image pickup apparatus utilizing such circuit.
The above-mentioned object can be attained, according to a first aspect of the present invention, by an image interpolation apparatus comprising a memory for storing digital image signal; memory readout means for reading pixel data in succession from the memory; consecutive first, second and third delay means for respectively delaying the image signal Sn, read by the memory readout means, to form pixel signals Snxe2x88x921, Snxe2x88x922, Snxe2x88x923; first, second, third and fourth coefficient generation circuits for generating interpolation coefficients k1, k2 respectively corresponding to the pixel signals Sn, Snxe2x88x921, Snxe2x88x922, Snxe2x88x923 and determined by N-th order functions from the position of the interpolated pixel Sxe2x80x2 positioned between the pixel signals Snxe2x88x921 and Sn-2; and a signal synthesis circuit for calculating the sum of respective product of pixel signal Sn and interpolation coefficient kn.
According to a second aspect of the present invention there is provided an image interpolation apparatus comprising a memory for storing digital image signal; memory readout means for reading pixel data in succession from the memory; first, second and third consecutive delay means for respectively delaying the image signal, read by the memory readout means, to respectively form pixel signals Snxe2x88x921, Snxe2x88x922, Snxe2x88x923; first and second coefficient generation circuits for generating interpolation coefficients k1, k2 determined by N-th order functions from the position of the interpolated pixel Sxe2x80x2 positioned between the pixel signals Snxe2x88x921 and Snxe2x88x922; first and second interpolation circuits for executing a calculation P=k1xc2x7Sx+(1xe2x88x92k1)xc2x7Sy on two arbitrary pixel signals Sx, Sy; and a signal synthesis circuit; wherein the pixel signals Sn, Snxe2x88x923 are entered into the first interpolation circuit while the pixel signals Snxe2x88x921, Snxe2x88x922 are entered into the second interpolation circuit and the first and second interpolation circuits execute interpolation with the interpolation coefficient k1, while the outputs Pn, Pnxe2x88x921 of the first and second interpolation circuits are entered into the signal synthesis circuit, which outputs the interpolated pixel signal Sxe2x80x2 based on an equation k2xc2x7(Pnxe2x88x921xe2x88x92Pn)+Pnxe2x88x921 utilizing the interpolation coefficient k2.
According to a third aspect of the present invention there is provided an image interpolation apparatus comprising a memory for storing digital image signal; memory readout means for reading pixels in succession in the horizontal direction from the memory; consecutive first, second and third delay means for respectively delaying the image signal read by the memory readout means; a coefficient generation circuit for determining, by an accumulator, an interpolation coefficient k indicating the position of the interpolated pixel Sxe2x80x2 positioned between the pixel signals Snxe2x88x921 and Snxe2x88x922 based on the current pixel signal Sn read by the memory readout means, the pixel signal Snxe2x88x921 from the first delay means, the pixel signal Snxe2x88x922 from the second delay means and the pixel signal Snxe2x88x923 from the third delay means; first and second interpolation circuits for executing a calculation P=k1xc2x7Sx+(1xe2x88x92k)xc2x7Sy on two arbitrary pixel signals Sx, Sy, and a signal synthesis circuit, wherein the pixel signals Sn, Snxe2x88x923 are entered into the first interpolation circuit while the pixel signals Snxe2x88x921, Snxe2x88x922 are entered into the second interpolation circuit and the first and second interpolation circuits execute interpolation with the interpolation coefficient k, while the outputs Pn, Pnxe2x88x921 of the first and second interpolation circuits are entered into the signal synthesis circuit, which outputs the interpolated pixel signal Sxe2x80x2 based on an equation Mxc2x7(Pnxe2x88x921xe2x88x92Pn)+Pnxe2x88x921 in which M is a coefficient derived from the interpolation coefficient k by M=kxc2x7(1xe2x88x92k).
According to the first and second aspects of the present invention, in image enlargement/reduction in the vertical/horizontal directions on real-time basis in a real-time process such as the electronic zooming or zoom-out process, an enlarged or reduced image of desired frequency characteristics with improved definition can be obtained by an interpolation circuit of simple circuit configuration.
Also according to a third aspect of the present invention, in image enlargement/reduction in the vertical/horizontal directions on real-time basis in a real-time process such as the electronic zooming or zoom-out process, the image definition can be significantly improved by an interpolation circuit of a simple circuit configuration.
The image memory may be composed of a field memory, or a frame memory for further improving the resolution in the vertical direction, in case the image data are obtained for example with a progressive scan CCD.
According to a fourth aspect of the present invention, there is provided an image pickup apparatus comprising an image pickup element and an image processing unit capable of enlarging or reducing the image, outputted from the image pickup element, in at least one of the horizontal and vertical directions, wherein the enlargement or reduction executed in the image processing unit is, based on the image data of four pixels adjacent in the horizontal or vertical direction, to obtain interpolated image data of a position between these pixels.
According to the fourth aspect, in enlarging or reducing the image, outputted from the image pickup element, in at least one of the horizontal and vertical directions, the image data of four pixels are used to obtain interpolated image data of a position between such four pixels, thereby providing an enlarged or reduced image with excellent frequency characteristics and with very little deterioration in image quality.
Furthermore, in generating interpolated data based on the image data of four points, taking data D0, D1, D2 and D3 of four adjacent pixels, wherein the position to be interpolated is located between D1 and D2 and a coefficient K is defined by the distance from such position to D1 divided by the distance between D1 and D2, there are at first calculated two average values weighted with K and (1xe2x88x92K) respectively for the former and latter data in each of two combinations of D0, D3 and D1, D2 and these two average values are used for determining the image data at the above-mentioned interpolated position. This method significantly facilitates the realization in hardware, as the image data can be obtained solely by integral calculation.
Other objects of the present invention, and the features thereof, will become fully apparent from the following description which is to be taken in conjunction with the attached drawings.